Terms Glossary - Memory Technology

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A

Access time
The average time interval between a storage peripheral (usually a disk drive or semiconductor memory) receiving a request to read or write a certain location and returning the value read or completing the write.

Ambyx test system
Also called 'Ambyx Oven.' A burn-in and test system, developed by Micron, that performs burn-in and many functional tests under high-stress conditions to ensure long-term quality and reliability of our parts.

Amray
A machine that measures critical dimensions of designated areas on the die at different process levels through the use of a SEM (Scanning Electron Microscope).

Application specific processor
Highly integrated logic chip designed for specific applications to work alongside a microprocessor (e.g., a math co-processor, graphics processor, artificial intelligence processor, LAN processor, digital signal processor). These chips offload some of the specialized number crunching from the MPU.

Array
The area of the RAM that stores the bits. The array consists of rows and columns, with a cell at each intersection that can store a bit. The large rectangular section in the center of the die where the memory is stored.

Asynchronous
A process in a multitasking system whose execution can proceed independently, "in the background.

Auto precharge
A Synchronous DRAM feature that allows the memory chip's circuitry to close a page automatically at the end of a burst.

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B

BEDO
Burst EDO - A variant on EDO DRAM in which read or write cycles are batched in bursts of four.Burst EDO bus speeds will range from 40MHz to 66MHz, well above the 33MHz bus speeds that can be accomplished using Fast Page Mode or EDO DRAM.

BGA
Ball Grid Array - a square package with solder balls on the underside for mounting. Use of BGA allows die package size to be reduced by allowing more surface area for attachment. Smaller packaging allows more components to be mounted on a module making greater densities available. The smaller package improves heat dissipation improving performance. See CSP and FBGA.

BIOS
Basic Input Output System - often referred to as CMOS, the BIOS provides an interface for a computer's hardware and software. The BIOS configuration determines how your hardware is accessed.

Bandwidth
A measure of the capacity of data that can be moved between two points in a given period of time.

Bank
A slot or group of slots that must be populated with modules of like capacity and fulfill the data width requirement of the CPU.

Bare board
A printed circuit board (PCB) that does not have any components on it.

Binary
Numbering system requiring only two digits: 0 and 1.

Bit
Binary Digit - the smallest piece of data (a 1 or a 0) that a computer recognizes.

Block
A physical unit of information in a logical record; block size is usually expressed in bytes.

Block diagram
A circuit or system drawing concerned with major functions and interconnections between functions.

Bond pad
Square metallic pads on the die where the ball bond is attached. The bond pad is used to find acceptable eyepoints.

Buffered memory
This is when there is so much memory the chipset needs assistance to deal with the large loading introduced by the large amounts of memory. A buffer isolates the memory from the controller to minimize the load the chipset sees.

Burn-in
The process of exercising an integrated circuit at elevated voltage and temperature. This process accelerates failure normally seen as "infant mortality" in a chip. (Those chips that would fail early during actual usage will fail during burn-in. Those that pass have a life expectancy much greater than that required for normal usage.)

Byte
A series of 8 bits.

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C

CAS
Column-address-strobe. The signal which tells the DRAM to accept the given address as a column-address. Used with RAS and a row-address to select a bit within the DRAM.

CAS-B4-RAS (CBR)
CAS Before RAS. Column Address Strobe Before Row Address Strobe. A fast refresh technique in which the DRAM keeps track of the next row it needs to refresh, thus simplifying what a system would have to do to refresh the part.

CHMOS
Complementary High-density Metal Oxide Semiconductor.

CISC
Complex Instruction Set Computing. This design logic is usually associated with microprocessors. CISC chips use instructions, or commands, that involve several steps in one.

CMOS
Complementary Metal Oxide Semiconductor. A process that uses both N- and P-channel devices in a complimentary fashion to achieve small geometries and low power consumption. On a PC CMOS generally refers to the BIOS information stored on a CMOS chip.

COAST
Cache On A Stick. Coast modules were used to upgrade a motherboard's L2 cache and Tag memory on some socket 7 and older motherboards.

COB
Chip On Board. A system in which semiconductor dice are mounted directly on a PC board and connected with bonded wires or solder bumps. The dice are usually mechanically protected with epoxy.

CPU
Central Processing Unit. The computer chip primarily responsible for executing instructions.

CRIMM
Continuity RIMMs are used to fill all unused RIMM sockets in a system. CRIMMs do not use any active components, and are used to continue the channel so that the signal can be properly terminated at the motherboard.

CSP
Chip Scale Package. CSP is a type of BGA in which the package is roughly the size of the die. CSP is also known as mBGA or micro-BGA.

Cache
A small fast memory holding recently accessed data, designed to speed up subsequent access to the same data. Typically used between a processor and main memory.

Capacitance
The property of a circuit element that allows it store an electrical charge.

Catastrophic failure
When a device that was initially good now fails to function under any condition.

Check Bits
Extra data bits provided by a module to support ECC.

Clock rate
The number of pulses emitted from a computer's clock in one second; it determines the rate at which logical or arithmetic gating is performed in a synchronous computer.

Column
Part of the memory array. A bit can be stored where a column and a row intersect.

Controller
One of the major units in a computer that interprets and carries out the instructions in a program.

Coplanarity
With respect to semi-conductor packages, the condition of leads in a package having all elements, or all elements in a seating plane, between two parallel planes.

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D

DDR
Double Data Rate is a type of SDRAM in which data is sent on both the rising and falling edges of clock cycles in a data burst.

DIMM
Dual Inline Memory Module. A module with signal and power pins on both sides of the board.

DRAM
Dynamic Random Access Memory. A type of memory component used to store information in a computer system. 'Dynamic' means the DRAMs need a constant 'refresh' (pulse of current through all of the memory cells) to keep the stored information. (See also RAM and SRAM.)

DUT
Device Under Test. It is used interchangeably with UUT (Unit Under Test).

Damping
In resonant circuits, the decay of oscillations due to the resistance in the circuit.

Data out
The signal line that carries the data read from the RAM (Random Access Memory).

Date code
A marking on all PCB and DRAM components indicating the manufacturing date of the product.

Die
An individual rectangular pattern on a wafer that contains circuitry to perform a specific function. The internal circuitry is made of thousands of tiny electronic parts. 'Die' refers to a semiconductor component or part that has not yet been packaged (also known as 'IC' (Integrated Circuit) or 'chip').

Die pick-up tool
The bondhead tool on the machine that picks up the die from the precisor and places it on the leadframe.

Die size
The physical measurements of the die.

Dielectric
A material that conducts no current when it has voltage applied to it. Two dielectrics used in semiconductor processing are silicon dioxide and silicon nitride.

Dielectric deposition
A layer of deposited oxide used to isolate metal 1 from metal 2 on double-level metal processes. This must be done in such a way to prevent hillock formation on level 1.

Diffusion
The intermingling of molecules of two or more substances. When high temperature processes are done in diffusion tubes, the high temperature accelerates diffusion. Typical diffusion furnace temperature is 950 degrees Centigrade, or 1742 degrees Fahrenheit.

Direct address
A computer memory address that is included as part of the instruction.
 

Direct memory access
A computer feature that allows peripheral systems to access the memory for both read and write operations without affecting the state of the computer's central processor.

Distributed processing
Systems using intelligent input/output controllers and direct - memory - access control to free the CPU of the details of block transfers.

Doping
The introduction of an element that alters the conductivity of a semiconductor. Adding boron to silicon will create a P-type (more positive) material, while adding phosphorus or arsenic to silicon will create N-type (more negative) material.

Driver board
A printed circuit board that sends signals from the interface board of the oven to the DUT board and back to the interface board. Each oven slot has a corresponding driver board located in the back of the oven.

Dry pack
The process of preparing product for shipment in moisture vapor barrier bags. This process includes tubed or reeled product and a clay desiccant, and an HIC (Humidity Indicator Card), vacuum-sealed in a moisture vapor barrier bag.

Dynamic
Type of RAM (Random Access Memory). To keep data in the D(ynamic)RAM memory, this data needs to be 'refreshed' (recharged). The electric charge fades out of a DRAM like air seeps out of a balloon. Because of this change, it is called Dynamic.

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E

E2PROM
Electrically Erasable PROM.

EAROM
Electrically Alterable Read-Only Memory.

ECC
Error Correction Code. Logic designed to correct memory errors.

EDO
A feature that allows for faster back to back accesses.

EEPLD
Electrically Erasable Programmable Logic Device. A CMOS PLD made by using EEPROM technology. It can be erased and reprogrammed.

EEPROM
Electrically Erasable, Programmable, Read-Only Memory chip. EEPROMs differ from DRAMs in that the memory stays in even if electrical power is lost. Also, the memory can be erased and reprogrammed.

EOB
End Of Buffer.

EPROM
Erasable PROM.

Electrostatic discharge (ESD)
The dissipation of electricity. ESD can easily destroy semiconductor products.

Encapsulation
The process of applying a cured-plastic protective housing to components. A mold compound. An Assembly step.

Etch
A process using a chemical bath (wet etch) or a plasma (dry etch) that removes unwanted substances from the wafer surface.

Ethernet
A local area network allowing several computers to transfer data on a communications cable.

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F

FBGA
Fine BGA is a ball grid array package with a fine pitch ball arrangement on the underside of the package (larger than CSP).

FIT
Failures In Time.

FPM
Fast Page Mode - A feature used to support faster sequential access to DRAM by allowing any number of accesses to the currently open row to be made after supplying the row address just once.

FSB
Front Side Bus is the data channel connecting the processor, chipset, DRAM, and AGP socket. FSB is described in terms of its width in bits and it's speed in MHz.

Failure rate
Description of the rate at which parts fail, usually expressed as percent per 1,000,000.

Fall out
Material that fails various tests within the component manufacturing process.

Flag
In computing: A status bit that causes some indication of the state or condition of the processing unit.

Flash memory
Flash memory is a non-volatile memory device that retains its data when the power is removed. The device is similar to EPROM with the exception that it can be electrically erased, whereas an EPROM must be exposed to ultra-violet light to erase.

Flatpack(1)
A Teflon Polyurethane wafer holder used to transport individual wafers. Flatpacks can be stacked to carry and protect several wafers at a time.

Flatpack(2)
A flat, rectangular IC package type with leads sticking out from the sides of the package.

Flip-flop
A circuit with two stable states that can be changed from one to the other. Flip-flops are the storage element in most of the SRAMs.

Floating
Pertaining to the condition of a device or circuit that is neither grounded nor connected to any potential. (Potential is voltage course or current course).

Floating gate
In Silicon Gate MOS technology: a gate that is not directly connected to the rest of the circuit. Used in EEPROMs.

Frequency converter
A device or system that can change the frequency of an alternating current, whether or not it changes the voltage or phase.

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G

GND
Ground.

Gold wire
The wire used to make a physical connection from the device to the leadframe.

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H

HTOL
High Temperature Operating Life.

Hard failure
Die that fail functionality testing. These failures have a visual defect 99 percent time, such as poly or metal bridging, missing geometries or layers, particles or contaminates.

Heat sink
A structure, attached to or part of a semiconductor device that serves the purpose of dissipating heat to the surrounding environment; usually metallic. Some packages serve as heat sinks.

HPM
Hyper Page Mode also known as EDO.

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I

I/O port
Connection to a CPU that is configured or programmed to provide data path between the CPU and external devices such as a keyboard, display, or reader; it may be an input port or an output port, or it may be bi-directional.

IC
Integrated Circuit. A tiny complex of electronic components and their connections that is produced in or on a small slice of material (as silicon).

ICE
In Circuit Emulator.

ID
Identification Detect. Pins present on DIMMs to provide information to the system using the module.

IEEE-488
Standard set by IEEE (Institute of Electrical and Electronics Engineers) for communication between pieces of electronic apparatus.

IO CARD
A PCB that interfaces between the computer and an interface board.

IR
Current x Resistance = Voltage. Also an abbreviation for Infrared.

ISD
An amorphous, doped polysilicon used as an underlying layer for the HSG poly to increase conductivity.

ISO 9
International Standards Organization.

Infant mortality
The occurrence of premature failures at a higher than normal rate.

Intelligent
A burn-in process whereby electrical functionality of the parts is continuously or periodically monitored and recorded under various voltages, temperatures, and refresh conditions during the burn-in process. This continuous or periodic monitoring of the functionality of each IC allows intelligent decisions to be made.

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J

JEDEC
Joint Electron Device Engineering Council - the group that establishes the industry standards for memory operation, features and packaging.

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K

Keys
Notches on a memory module that prevent it from being installed incorrectly or into an incompatible system.

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L

L1 cache
Level 1 cache. A small cache integrated in processor that provides a small working space for quick access to the most recently used data.

L2 cache
Level 2 cache. L2 cache has the same purpose as L1 cache, but is usually not integrated into the processor. L2 cache is traditionally made of SRAM and in socket 7 and older motherboards was in some cases upgradeable. See COAST.

Laser scribe
Process which uses a YAG (Yittrium-aluminum-Garnet) laser to melt the silicon in a dot matrix to form wafer scribe numbers.

Latch
Circuit element that stores a given value on its output until told to store a different value.

Latch up
An undesired phenomenon in an integrated circuit whereby a circuit locks in a certain state and will not change.

Latch voltage
The effective input voltage at which a flip-flop changes states.

Lead
The metal extensions from an IC package or discrete component that connects the component to the PCB. The leg or contact point of the component that is either physically soldered to a PC board or placed within a socket for connection.

Leadframe
A metal structure that is part of the device. The die is attached to the leadframe.

Leads
Leads or Legs: The official name for the metal 'feet' on an IC. Also called 'pins.' The part of the lead assembly that is formed after a portion of the lead frame is cut away. The part's connection to the outside world.

Leakage
Undesirable conductive paths in components, subsystems, and systems; also the current through such paths.

Life testing
Accelerated testing of electronic components to establish their field reliability.

Linear circuit
A circuit that produces a voltage output approximately proportional to the input voltage, generally over a limited range of voltage frequency.

Linear regulator
Power supply design in which the voltage is held constant by dissipating 50% of the input voltage times and output current as a margin.

Linear selection
A method of selecting memory or input/output devices that dedicates one address line per chip selection; results in overlapping or noncontiguous memory; used because it is the cheapest method of selection.

Locator pin
A pin in the mold which locates the leadframe in the correct position on the mold for processing.

Logic circuit
An integrated circuit which provides a fixed set of output signals according to the signals present at the input.

Logic gate
Several individual device functions on an integrated circuit chip.

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M

MHz
Megahertz is a measurement of clock cycles in millions of cycles per second.

MIPS
Millions of Instructions Per Second. This measurement is generally used when describing the speed of computer systems.

MNOS
Metal Nitride Oxide Semiconductor. The technology used for EAROMs (Electrically Alterable ROMs); not to be confused with NMOS.

MOS
Metal-Oxide-Semiconductor. Layers used to create a semiconductor circuit. A thin insulating layer of oxide is deposited on the surface of the wafer. Then a highly conductive layer of tungsten silicide is placed over the top of the oxide dielectric.

MOS device
Device in which current flow occurs in a single channel of P- or N-type material and is controlled by an insulated electrode on the surface of the channel region.

MOS process
The set of chemical and metallurgical steps used to make MOS Large Scale Integration.

MOST
Metal Oxide Semiconductor Transistor.

MTBF
Mean Time Between Failures.

MTTF
Mean Time To Failure.

MU
Memory Unit. Usually a printed circuit board assembly populated with memory chips that stores a certain quantity of memory. Intel term for one of the types of cards in a memory system card set.

Megabit
Amount of memory equal to 1,048,576 bits of information. (Abbreviated Mb.)

Megabyte
Amount of memory equal to 1,048,576 bytes of information. (Abbreviated MB.)

Memory configuration
The amount of memory in an IC and how it is accessed.

Memory cycle
Minimum amount of time required for a memory to complete a cycle such as read, write, read/write, or read/modify/write.

Memory Controller
The logic chip used to handle the I/O (input/output) of data going to and from memory. See chipset.

Memory types
Cache Data SRAM: quick-access chip.
DRAM dynamic random access memory.
SDRAM synchronous dynamic random access memory.
DDR SDRAM double data rate dynamic random access memory.
SLDRAM synchronous link dynamic random access memory.
RDRAM Rambus dynamic random access memory.
EPROM: erasable, programmable, read-only memory.
PROM: programmable, read-only memory.
RAM: random access memory.
ROM: read-only memory (permanent memory that cannot be changed).
SRAM: static random access memory.
 

Micron
A unit of measure equivalent to one-millionth of a meter; synonymous with micrometer.

Moisture vapor barrier bag
A vacuum-sealed bag designed to keep the moisture out so that the parts inside will not be damaged.

Monolithic
Contained on one chip or substrate, as a microprocessor system including not only the logic but also memory or input/output circuits.

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N

NC
Not Connected.

NMOS
N-channel Metal Oxide Semiconductor. This pertains to MOS devices constructed on a P-type substrate in which electrons flow between N-type source and drain contacts. NMOS devices are typically two to three times faster than PMOS devices.

NOR
Logical NOT-OR.

NS
Nanosecond (ns). One billionth of a second; used to measure the speed of the parts (e.g., -07 nanoseconds).

NVRAM
Non-Volatile Random Access Memory.

Nand
A computer logic circuit that produces an output which is the inverse of that of an AND circuit.

Nano
Literal: One-billionth (10 to the -9). Diffusion: A tool used to measure the thickness of a film on a wafer.

Nanometer
One billionth of a meter.

Negative charge
Charge caused by the presence of electrons, not their absence.

Newton
A unit of force in the meter-kilogram-second system needed to accelerate a mass of one kilogram one meter per second per second.

Nibble
Usually 4 bits or half a byte.

Nonvolatile memory
A memory that retains information if power is removed and then reapplied.

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O

OE
Output-Enable. On a part, where data-in and data-out are shared on the same pins, the OE must be triggered to request output data.

OHM
A unit of measure of electrical resistance.

Open
A circuit interruption that results in an incomplete path for the current flow. (e.g., an open wire which opens the path of the current).

Operating system
Software controlling the overall operation of a multipurpose computer system, including such tasks as memory allocation, input and output distribution, interrupt processing, and job scheduling.

Operational amplifier
An electronic circuit which amplifies 'linear' (also called analog) signals.

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P

PAL
Programmable Array Logic. A device that can be programmed to do certain logic functions. Then a fuse inside of the device can be blown so the programmed information can never be changed. Sometimes called a PLD (Programmable Logic Device) Language.

PCB
Printed Circuit Board; board that contains layers of circuitry that is used to connect components to the outside.

PC100
Intel's PC100 specification defines the requirements for SDRAM used on 100MHz FSB motherboards.

PC133
The PC133 specification details the requirements for SDRAM used on 133MHz FSB motherboards. PC133 SDRAM can be used on 100MHz FSB motherboards but will not yield a performance advantage over PC100 memory at 100MHz.

PD
Presence Detect. Indicator pins on SIMMs and DIMMs that provide information to the system using the module.

PGA
Pin Grid Array.

PLA
Programmable Logic Array. An array of logic elements that can be programmed to perform a specific logic function. It can be as simple as a gate or as complex as a ROM and can be programmed (often by mask programming) so that a given input combination produces a known output function.

PLD
Programmable Logic Devices. Devices with 10-100 times higher level of integration than a TTL; called programmable because they can be customized in software rather than in hardware.

PMOS
P-channel Metal Oxide Semiconductor. This pertains to MOS devices constructed on an N-type silicon substrate in which holes flow between source and drain contacts.

PQFP
Plastic Quad Flat Pack. A square, flat package with gullwing leads located around all four sides of the package.

PWB
Printed Wiring Board; board upon which there are layers of printed circuits where DRAMs can be attached with solder so that memory can be accessed.

Pad
A conductive bonding island located strategically on circuit chips for inter-connecting circuit elements or for bringing connections from circuit leads to the outside.

Page
The number of bits that can be accessed from one row address.

Page mode
Mode in which if RAS is kept low and the DRAM is given a column-address without being given a new row-address, the chip will remember which row it was on the last time and automatically stay on that row. It is like saying that all the bits along one row are all on the same 'page,' and the part will assume the same page is intended until a different page is specified.

Parametric fail
A test of the DUT that checks for pin leakage, the amount of current it draws, opens, and shorts.

Parametric test
A test that measures values, also called a dynamic test as opposed to a functional or Go/No-Go test.

Parametrics
A series of voltage and current tests performed on all products in Probe. The test checks for variations in the fabrication process. Test results are used by engineers to modify or correct processes.

Parity Bit
A bit added to a group of bits to detect the presence of an error.

Parser
The portion of a language translator (compiler or assembler) which determines the logical structure of the program being completed.

Passive device
A device incapable of current gain or switching such as a resistor or capacitor.

Passive element
A circuit element without an energy source such as a capacitor or resistor.

Pin
The metal extensions from an IC package or discrete component that connects the component to the PCB.

Pin one hole
The hole located on the 'pin one' side of the leadframe.

Pin-one indicator
An indentation or mark on the top of the part that indicates where the first lead of the die inside is located.

Polyimide
Protective covering over the die; also called Die Coat

Polysilicon
Poly-crystalline layer of silicon used for the silicon gate contact in silicon gate MOS devices; also used for interconnections between devices.

Populated board
A PCB with components.

Power down
To turn the system's power OFF.

Power up
To turn the system's power ON.

Probe
Wire used to make electrical contact with a pad on a die; usually made of either beryllium copper, tungsten, or palladium. The diameter of the probe shank is 10 mils, the diameter of the standard probe tip is 1.5 mils, and the length is 7 or 14 mils.

Probe card
A fiberglass card (P.C. Board) that has a hole in the center in which there are pins that are aligned and placed on pads located on the die. As the pins on the probe card are placed on die pads, the probe card tests and sorts die for functionality.

Pull-up
A device or method used to keep the output voltage of a device at a high level; often a resistor network connected to a positive supply voltage.

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Q

Quad flat pack
QFP: A flat, rectangular, integrated circuit with its leads projecting from all four sides of the package without radius.

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R

RAM
Random Access Memory - a data storage device for which the order of access to different locations does not affect the speed of access. Data is typically stored in RAM temporarily for use by the process while the computer is operating.

RAS
Row-Address-Strobe: the signal that tells the DRAM to accept the given address as a row-address. Used with CAS and a column-address to select a bit within the DRAM.

RDRAM
Rambus DRAM is an evolutionary type of DRAM that uses a 16-18 bit data path and is designed to operate with FSB speed of 800MHz producing a burst transfer rate of 1.6 gigahertz.

RIMM
Rambus Inline Memory Modules used for RAMBUS DRAM.

RISC
Reduced Instruction Set Computing. The design methodology is usually associated with microprocessors. RISC chips use simpler instructions, or commands, than CISC chips. However, they need to use more steps to perform many functions that CISC chips perform in one step. SPARC and MIPS chips are based on RISC.

RMA
Returned Material Authorization; required if a customer desires to return products. Also refers to parts that have been returned from a customer.

RPL
An acronym to represent RS/1 Programming Language. RPLs are functions or procedures written in RS/1's built in programming language. These RPLs are used to automate tasks and analyses.

RW
Read/Write memory.

Ramp
A period of time in the oven when the temperature goes up.

Random failure region
The portion of the bathtub curve that represents the useful portion of device life.

Range
The difference between the smallest and largest values in a set of data. This is the simplest measure of variation.

Read time
The amount of time required for the output data to become valid once the read and address inputs have been enabled; generally called access time.

Read-restore
A mode of operation used in core memory systems.

Read/write memory
A generic term for Random Access Memories.

Refresh
The process used to restore the charge in DRAM cells at specific intervals.

Refresh rate
Is a count of the number of rows (in thousands) refreshed at a time in a refresh cycle. Common refresh rates are 1K, 2K, and 4K.

Registered memory
Registers delay memory information for one clock cycle to ensure all communication from the chipset is collected by the clock edge, providing a controlled delay on heavily loaded memories.

Relative address
An identifier that indicates the position of a memory location in a computer routine relative to the base address as opposed to the memory location's absolute address.

Release time
The amount of time data must remain stable after a device or circuit has been clocked; also called 'hold time.'

Resist
A material that prevents etching or plating of the area it covers; also called photoresist.

Rise time
The amount of time required for a signal level change to increase from ten percent to ninety percent of its final specified value.

Row
Part of the RAM array; a bit can be stored where a column and a row intersect.

Row/columns
Describes how many rows are on a wafer map in the X direction. (X = left to right. Y = top to bottom).

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S

SDRAM
Synchronous Dynamic Random-Access Memory. Delivers bursts of data at very high speeds using a synchronous interface.

SER
Soft Error Rate. An error caused by temporary disruption of memory cell.

SGRAM
Syncronous Graphics RAM. A single port DRAM designed for graphics hardware that require high speed throughput such as 3-D rendering and full-motion video.

SIM
Single In-line Module. Same as SIP except with a connector edge instead of leads.

SIMM
Single In-line Memory Module: a high-density DRAM package alternative consisting of several components connected to a single printed circuit board. A small PCB designed to mount in a socket on a larger PCB providing a large memory upgrade in a small space.

SIP
Single In line Package. A component or module that has one row of leads along one side. Many resistors come in SIP form.

SLDRAM
Synchronous Link Dynamic Random Access Memory. SLDRAM is the next evolution of SDRAM using a multiplexed command bus allowing fewer pins to increase bandwidth and allow higher FSB speeds.

SODIMM
Small Outline Dual Inline Memory Module. Smaller and thinner than standard DIMMs, SODIMMs are typically used in laptop computers.

SORIMM
Small Outline Rambus Inline Memory Module. SORIMMs have a smaller profile that standard RIMMs and are used in laptop computers and systems that have strict size requirements.

SOJ
Small Outline J-lead package. A rectangular package with leads sticking out of the side of the package. The leads are formed in a J-bend profile, bending underneath and towards the bottom of the package.

SPC
Statistical Process Control. The use of statistics to determine uniformity around a target value.

SPHS
An operation found in coat and develop programs that stands for spin high speed.

SRA
Standard Readability Assessment.

SRAM
((Static Random Access Memory) An integrated circuit similar to a DRAM (Dynamic Random Access Memory) with the exception that the memory does not need to be refreshed.

Scribe
A marking on a wafer that identifies the wafer and the lot it came from. The scribe is located on the front of the wafer, opposite the major flat.

Serial Presence Detect (SPD)
Serial Presence Detect. An enhanced presence detect that uses an EEPROM to store modules timings, configuration, and the manufacturer's data.

Semiconductor
An element, such as silicon, that has intermediate in electrical conductivity between conductors and insulators, which conduction takes place by means of holes and electrons.

Sense amp
The sense amp acts as a distributor of current on the die.

Sense amplifier
A device or circuit capable of sensing very low voltages and amplifying them to some higher voltage level.

Shrink
A reduction in die (chip) size. A reduction in the size of the circuit design resulting in smaller die sizes that increases the number of possible die per wafer.

Soft error
An error caused by a temporary disruption of the memory cell.

Soft error fail
A part with a temporary, single-bit failure during the soft error test.

Speed
The time it takes the RAM to put information into its memory or get information out of its memory. It is measured from the time that an address and proper control signals are given, until the information is stored or placed in the device's output(s).

Speed grade
Our coding for the speed that the stored information in the part can be retrieved by a computer. For DRAMs, a -5 is 50 nanoseconds, a -6 is 60 nanoseconds, a -7 is 70 nanoseconds, etc. For SRAMs, a -10 is 10 nanoseconds, etc.

Spike
The sudden drastic portion of a pulse that significantly exceeds its average amplitude. Standard deviation A measure of variation for a particular process or product characteristic. This is often abbreviated as 'STD DEV' or 'STD'.

Starting address
Smallest or lowest address that a memory system will respond to.

Static ram
Unlike volatile memory, static memory retains its contents even when the main current is turned off. The trickle of electricity from a battery is enough to refresh it.

Strobe
An input that allows parallel data to be entered a synchronously.

Substrate
The actual structural material on which semiconductor devices are fabricated, whether passive or active. The term applies to any supportive material, such as the materials used in the fabrication of printed circuits.

Surface-mount package
A J-leaded or Gullwing package or BGA that can be mounted directly on the surface of P.C. Boards (as opposed to through-hole packages).

Switches menu
The menu in BIOS containing user-configurable options for a PC's hardware configuration.

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T

TAG
Tag memory acts as an index for the information stored in L2 cache.

TBD
To Be Determined. Used on quotes in reference to shipping dates.

TCAC
A measurement of the speed or how fast the part is; it is the time it takes to get a bit of information out of the part after CAS comes down.

TCE
Thermal Coefficient of Expansion. A constant that describes the changes in linear dimensions with respect to temperature for a device or material.

TG
A code for TSOP (see TSOP). A package-type code.

TSOP
Thin Small Outline Package. It is thinner and slightly smaller than an SOJ and with gullwing-shaped leads. A thin, rectangular package with leads sticking out the sides of the package.

Test
An electrical process every product goes through which tests the parts for parametric, speed, and functional failures.

Transistor
A semiconductor device that uses a stream of charge carriers to produce active electronic effects.

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U

Unbuffered memory
This is where the chipset controller deals directly with the memory. There is nothing between the chipset and the memory as they communicate.

UM
Micron (or micrometer). A unit of length equal to one millionth of a meter.

US
Microsecond: One millionth of a second.

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V

Vcc
Collector Common Voltage.

VRAM
Video RAM. DRAM with an on-board serial register/serial access memory designed for video applications.

Vss
Vss is the abbreviation for the ground on a connection. (Like the ground wire on a battery.)

Variable
A condition, transaction, or event that changes or may be changed as a result of processing additional data through a system.

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W

WE
Write-Enable; WE must be pulsed low when data is written to the chip.

Write time
Time expended from the moment data is entered for storage to the time it is actually stored.

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X

Y

Z

Zero-page addressing
An addressing mode in which the address is given as an unsigned binary number that specifies one of the memory locations between 0 and 256(decimal).

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